US data storage company Seagate Technologies has announced two new processors for silicon chips that are based on open RSIC-V instruction set architecture (ISA).

One new processor is a high-performance core, and the other is an area-optimised core. The high-performance core processor offers real-time, critical HDD workload solutions that are able to process up to triple the power of original processors.

The area-optimised core processor is optimised for both footprint and power savings, and is able to execute security-extensive edge computational operations.

Both processors offer robust edge-to-cloud data mobility, trustworthiness, and security.

We live in a time of unprecedented growth of enterprise data—and much of this data is in motion. These cores will allow devices to share a common RISC-V ISA. Using open security architectures, they will enable more secure movement of data,” said Cecil Macgregor, the Vice President of Application-Specific Integrated Circuit (ASIC) Development.

As a member of the OpenTitan Project, a Google-backed open-source secure chip design organisation, Dominic Rizzo of Google Cloud, says that he sees “significant potential” for architectures such as RSIC-V.

“Because Seagate understands the promise of RISC-V for security, we are excited to collaborate with Seagate on the open-source silicon root of trust we are currently developing,” Mr. Rizzo added.

The Seagate processing cores are expected to accelerate real-time analysis at data centers, which is crucial to scientific work where mass amounts of data are processed on a daily basis.

“Using computational storage to move processing near data has begun to significantly alter the way we analyze data and perform scientific discovery. By having compute integrated closely with storage we are able to create persistent data transformations that speed up data analysis by 1000-fold,” said Brad Settlemyer, Senior Research Scientist at the Los Alamos National Library.

John Morris, Chief Technology Officer of Seagate, points out that introducing RISC-V to storage devices creates an opportunity to implement application-specific computational capabilities that enable massive parallel computational storage solutions. This could enable use cases like scientific simulations, including weather prediction, and enabling the learning part of machine learning.

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